MN AMS X-Haul - FPGA Engineer
Mandatory:
- Knowledge of FPGA technology and life cycle
- FPGA design consolidated experience
- Proficiency in VHDL (preferred) and/or Verilog
- Competence in:
- clock management,
- timing constraining and verification,
- resource usage analysis and saving
- Competence in "best design and coding practices"
- Competence in “coding for reuse and technology portability”
- Knowledge of some FPGA specific tools, for instance: Xilinx Vivado, Altera Quartus, Mentor Graphics suite for FPGA (HDL Designer, ModelSim, QuestaSim, Precision)
- Basic lab hands on experience
- Good spoken and written English
- Good teamwork skills
- Adaptability and accountability
- Effectively cooperating with people with different technical background and culture, dealing with diverse situations and viewpoints
Nice to have:
- Work experience in FPGA design
- Experience on complex systems (HW + FPGA + SW, including big ASSP)
- Knowledge of microwave point-to-point communication application
- Knowledge of radio transmission concepts (equalization, modulation, FEC, clock and carrier recovery, XPIC, diversity, adaptive modulation)
- Knowledge of Ethernet standard and implementation experience
- Knowledge of SDH and PDH standards
- Knowledge of QoS, policing, CES concepts and implementation experience
- Basic knowledge of PLL theory and synchronization concepts
- Knowledge of Mentor Graphics suite for FPGA (HDL Designer, ModelSim, QuestaSim, Precision) with past working experience
- Knowledge of Xilinx tool chain (Vivado and ISE) and 28 nm devices
- Knowledge of Altera Quartus tool and Altera 28 nm devices
- Experience in managing FPGA development within Git or equivalent CVM tool
- Troubleshooting capabilities on complex systems