Intern,L1
Position Requirements(familiar with one of the technical areas)
- working experience in developing digital SoC projects, including design, functional verification and system integration.
-experience on coding language of VHDL, Verilog and System Verilog.
-experience on Verification methodologies, e.g. OVM/UVM, to develop verification environment and test the target DUT as well
-Hands-on experience of kinds of HW interface such as I2C, UART, LMP...
-Hands-on experience of ModeSim, VSC, Verdi, Quartus, Spy Glass, Catapult , Matlab
-Familiar with 3GPP protocol(LTE/WCDMA) is a big plus
-Familiar with L1 physical layer algorithm is a big plus
Personal qualities
- customer and result oriented attitude
- both team player and individual worker
- good communication skills
- flexible, enthusiastic, and creative
- self-motivated, target driven and innovative thinking
- open minded and willing to accept challenge
- pro-activity and independent problem solving through own experience and network
- ambition to become world-class digital design expert
- fluent spoken and written English.