FPGA RTL Development or Verification Senior Expert
|
As a member of Nokia SoC R&D team, the
candidate will be a key contributor and leader of LTE/5G FPGA RTL design and
algorithm modeling. |
Qualifications
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v Master or above, major in Telecommunication,
Electronic Engineering, Computer Science or related. v 10+ years FPGA/ASIC design or verification
experience, familiar with hardware design/verification language such as
Verilog, VHDL, System Verilog and synthesis, implementation, simulation
tools. v Have experience on digital signal processing
technology. v Deep understanding on RAN system
architecture and specification, capable of system level solution designing. v Strong communication and documentation
skill. v Good leadership, requirement understanding,
task prioritizing, capable of leading team to accomplish projects. v Highly responsible, self-motivated and
proactive working attitude. v Good team working, willing to contribute to
team’s success. v Fluent in both oral and written English,
capable of participate English meetings independently. |
